169 return (tracks & mask) !=
TRACK_BIT_NONE ? tracks & mask : tracks;
179 return wires == 0 ? SPR_WIRE_BASE : wires;
189 return pylons == 0 ? SPR_PYLON_BASE : pylons;
247 static const int _tunnel_wire_BB[4][4] = {
259 const int *BB_data = _tunnel_wire_BB[dir];
261 wire_base + sss->image_offset, PAL_NONE, ti->
x + sss->x_offset, ti->
y + sss->y_offset,
262 BB_data[2] - sss->x_offset, BB_data[3] - sss->y_offset,
BB_Z_SEPARATOR - sss->z_offset + 1,
265 BB_data[0] - sss->x_offset, BB_data[1] - sss->y_offset,
BB_Z_SEPARATOR - sss->z_offset
286 Corner halftile_corner = CORNER_INVALID;
294 byte OverridePCP = 0;
315 static const uint edge_corners[] = {
316 1 << CORNER_N | 1 << CORNER_E,
317 1 << CORNER_S | 1 << CORNER_E,
318 1 << CORNER_S | 1 << CORNER_W,
319 1 << CORNER_N | 1 << CORNER_W,
321 SpriteID pylon_base = (halftile_corner != CORNER_INVALID &&
HasBit(edge_corners[i], halftile_corner)) ? pylon_halftile : pylon_normal;
329 wireconfig[TS_NEIGHBOUR] =
MaskWireBits(neighbour, trackconfig[TS_NEIGHBOUR]);
341 PPPpreferred[i] = 0xFF;
346 for (uint k = 0; k < NUM_TRACKS_AT_PCP; k++) {
348 if (TrackSourceTile[i][k] == TS_NEIGHBOUR &&
357 if (
HasBit(wireconfig[TrackSourceTile[i][k]], TracksAtPCP[i][k])) {
360 PCPpos = (TrackSourceTile[i][k] == TS_HOME) ? i :
ReverseDiagDir(i);
365 if (
HasBit(trackconfig[TrackSourceTile[i][k]], TracksAtPCP[i][k])) {
371 if (!
HasBit(PCPstatus, i)) {
398 if (tileh[TS_HOME] == tileh[TS_NEIGHBOUR] || (isflat[TS_HOME] && isflat[TS_NEIGHBOUR])) {
399 for (uint k = 0; k < NUM_IGNORE_GROUPS; k++) {
408 if ((PPPallowed[i] & PPPpreferred[i]) != 0) PPPallowed[i] &= PPPpreferred[i];
420 if (PPPallowed[i] != 0 &&
HasBit(PCPstatus, i) && !
HasBit(OverridePCP, i) &&
425 if (
HasBit(PPPallowed[i], temp)) {
426 uint x = ti->
x + x_pcp_offsets[i] + x_ppp_offsets[temp];
427 uint y = ti->
y + y_pcp_offsets[i] + y_ppp_offsets[temp];
460 Track halftile_track;
461 switch (halftile_corner) {
462 case CORNER_W: halftile_track =
TRACK_LEFT;
break;
463 case CORNER_S: halftile_track =
TRACK_LOWER;
break;
464 case CORNER_E: halftile_track =
TRACK_RIGHT;
break;
465 case CORNER_N: halftile_track =
TRACK_UPPER;
break;
472 SpriteID wire_base = (t == halftile_track) ? wire_halftile : wire_normal;
477 int tileh_selector = !(tileh[TS_HOME] % 3) * tileh[TS_HOME] / 3;
479 assert(PCPconfig != 0);
481 sss = &RailCatenarySpriteData[Wires[tileh_selector][t][PCPconfig]];
489 sss->x_size, sss->y_size, sss->z_size, GetSlopePixelZ(ti->
x + sss->x_offset, ti->
y + sss->y_offset) + sss->z_offset,
516 if ((length % 2) && num == length) {
519 sss = &RailCatenarySpriteData[WIRE_X_FLAT_BOTH + offset];
522 sss = &RailCatenarySpriteData[WIRE_X_FLAT_SW + (num % 2) + offset];
530 sss->x_size, sss->y_size, sss->z_size, height + sss->z_offset,
542 uint x = ti->
x + x_pcp_offsets[PCPpos] + x_ppp_offsets[PPPpos];
543 uint y = ti->
y + y_pcp_offsets[PCPpos] + y_ppp_offsets[PPPpos];
544 AddSortableSpriteToDraw(pylon_base + pylon_sprites[PPPpos], PAL_NONE, x, y, 1, 1,
BB_HEIGHT_UNDER_BRIDGE, height,
IsTransparencySet(
TO_CATENARY), -1, -1);
552 uint x = ti->
x + x_pcp_offsets[PCPpos] + x_ppp_offsets[PPPpos];
553 uint y = ti->
y + y_pcp_offsets[PCPpos] + y_ppp_offsets[PPPpos];
554 AddSortableSpriteToDraw(pylon_base + pylon_sprites[PPPpos], PAL_NONE, x, y, 1, 1,
BB_HEIGHT_UNDER_BRIDGE, height,
IsTransparencySet(
TO_CATENARY), -1, -1);
574 wire_base + sss->image_offset, PAL_NONE, ti->
x + sss->x_offset, ti->
y + sss->y_offset,
575 sss->x_size, sss->y_size, sss->z_size,
597 bool disable = (p1 != 0);
608 if (rv_info->
engclass == 2 && rv_info->railtype == old_railtype) {
610 rv_info->railtype = new_railtype;